FPGA

This project presents an FPGA architecture for the computation of visual attention based on the combination of a bottom-up saliency and a top-down task-dependent modulation streams. The target applications are ADAS (Advanced Driving Assistance Systems), video surveillance, or robotics.

Fine-grain pipelined and superscalar datapath to reach high performance at low working clock frequencies with FPGAs. The final goal is to achieve a data-throughput of one data per clock cycle. We show implementations of optical flow, disparity, and low-level local features